CoreEL has developed a host of Digital Video IPs. The decoder cores developed by CoreEL are single chip solutions targeted towards FPGAs. The cores are optimized to deliver the highest performance while minimizing the latency through the system. They have been designed to support a wide range of bit rates and resolutions.

The decoder designs are fully autonomous and do not require an external processor to aid the decode operation. The IP’s are both flexible and accommodating depending on the applications they are targeted.

The cores support Full HD Decoding at 1080p 60 fps and have been designed to achieve maximum throughput. The solutions have been implemented on a single FPGA device. The cores are currently available on Virtex-4, Virtex-5, Virtex-6, Spartan-6 and Cyclone3 devices