AMSTERDAM, Netherlands, September 14, 2009 -- CoreEL Technologies, one of India’s leading FPGA IP & Design Services Company, today announced the availability of the AVC Intra on Xilinx® Virtex® FPGAs, targeted for Professional Video & Broadcast Studio markets at IBC 2009 in Amsterdam, Netherlands. With a maximum bit-rate support of 100 Mbps for CAVLC entropy coding (AVC Intra 100) and 50 Mbps for CABAC entropy coding (AVC Intra 50), the IP introduces a new level of performance and functionality needed for high end post production applications. The AVC Intra decoder supports 4:2:0 and 4:2:2 chroma formats up to 10-bit color depth.

The decoder brings further speed improvements to achieve resolutions up to 1920x1080 interlaced and progressive, easily decoding full HD at optimal frame-rates at only 125 MHz clock frequency with CABAC / CAVLC running at 50 Mbps and 100 Mbps respectively. The IP is capable of supporting both Panasonic AVC Intra frame decoding as well as H.264 Inter frames (I-P-B) decoding. The solution is fully validated in hardware with ITU-T, Franhoufer and Panasonic professional test streams.

"Combining our expertise in FPGA Design and in Video domain, we have developed H.264 Inter and Intra frame Decoder IP solution with compelling features and performance to drive the high end broadcast & professional video markets," says Vishwanath Padur, Vice President, Business Development at CoreEL Technologies.