VLSI Design Trends & VIVADO Design Flow workshop @IIT Guwahati, Assam

We from CoreEL Technologies conducting 3 days hands on workshop on “VLSI DESIGN TRENDS & VIVADO DESIGN FLOW” in collaboration with XILINX at Electronics & ICT Academy IIT Guwahati, Assam on 6th – 8th Oct 2017

Course Objective
Main Course Objective is to provide hands on knowledge in Digital VLSI using FPGA board. The program will focus on practical aspects and include examples which are relevant to the current industry requirements. Lab sessions will include the following:
• Digital Design concepts.
• FPGA design flow using Vivado.
• Clocking resources implementation in Vivado & Static timing analysis Vectorization.
• Block Memory implementation in vivado.
• FSM implementation in Vivado & XSIM simulation
• Vivado logic analyzer & its features
• Introduction to HLS
• Optimizing for Area and Resources

Last Date for Registration: 1st Oct 2017

Please Register yourself as seats are limited at following link: https://goo.gl/Agg3jJ
Click here for the detailed Course Brochurehttps://goo.gl/wxV9sQ
Click here for the Workshop Schedule: https://goo.gl/gZYzGz