News & Events
A 5-day Faculty Development Program on “FPGA Design Flow with Vivado and 7-series boards” was held from 6th September to 10th September 2016 at CoreEL Technologies, Bangalore office. The program was attended by faculty and research scholars from institutes and universities across India, including IIT-Indore, NITs, JNTUA, University of Calcutta, Mumbai and VTU. The faculty...
September 15, 2016
CoreEL and ANSYS collaboratively conducted the BEL Tech Day at Movenpick Hotel on 19th Aug 2016. It was a focused technical event for Mechanical Engineers who are responsible for Design, Development, Structural and Thermal stability of Electronics system at the various divisions of BEL. The theme of the event was “TURN ON your design efficiency...
August 29, 2016
CoreEL is conducting a 3 day Workshop on ASIC and FPGA design flow On 28, 29 and 30th September, 2016 at Gujarat Technological University. Click the below link to register: (Free Registration) REGISTER
August 24, 2016